利用主动负载-拉法优化IMD3和IMD5端接,降低大功率LDMOS器件中的电基带记忆效应

A. Alghanim, J. Lees, T. Williams, J. Benedikt, P. Tasker
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引用次数: 6

摘要

在放大器设计中,减小电内存的通常方法是将基带阻抗终止为宽带短路,通常以一组旁路电容器的形式连接在器件的输出端附近。本文研究了该方法的有效性,并比较了不同中频阻抗端点下的线性性能。有源中频负载-牵引是一种与调制频率无关的工程手段,用于解决由双音激励产生的显著低频中频电压分量。提出了选择性中频负载,以探测作为中频阻抗函数的器件线性度。一个重要的观察结果是,与传统中频短端接的情况相比,特定中频负载的存在导致IM3和IM5互调分量分别被抑制超过16dB和10dB。这些研究是在一个专用的高功率测量系统中使用一个特性为2.1 GHz的20W LDMOS器件进行的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Reduction of electrical baseband memory effect in high-power LDMOS devices using optimum termination for IMD3 and IMD5 using active load-pull
The usual approach in minimizing electrical memory in PA design is to terminate base-band impedances into a broadband short circuit, usually provided in the form of an array of bypass capacitors attached close to the output terminal of the device. This paper investigates the validity of this approach and compares linearity performance under different IF impedance terminations. Active IF load-pull is used as a modulation-frequency independent means of engineering the significant low-frequency IF voltage components generated as a result of two-tone excitation. Selective IF loads are presented in order to probe device linearity as a function of IF impedance. One significant observation is the existence of specific IF loads that result in the suppression of both IM3 and IM5 intermodulation components by more than 16dB and 10dB respectively, in comparison to the case of a conventional IF short termination. These investigations are performed using a 20W LDMOS device characterised at 2.1 GHz within a purpose built, high-power measurement system.
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