Oscillation-based technique for TSV post-bond test considerations

Through Silicon VIAs (TSVs) are critical elements in three dimensional integrated circuits (3D ICs). Various defects may occur during their fabrication process, the bonding stage or during their useful lifetime. In this work a testing method is suggested to detect the defects using a post-bond oscillation test scheme. Variations in the output signal's frequency are shown to detect the defects in TSVs. Simulations show the effectiveness of the method. The process and temperature variations, as well as Monte Carlo and delay analysis, provide more information about the conditions under which this method can be used for parametric defects.