Jaehwan Ko, Yeunhee Huh, Min-Woo Ko, Gyeong-Gu Kang, G. Cho, Hyunsik Kim
{"title":"一种4.5 v输入0.3 ~ 1.7 v输出降压型双路DC-DC变换器，具有250mΩ-DCR电感，用于低压soc，效率为91.5%","authors":"Jaehwan Ko, Yeunhee Huh, Min-Woo Ko, Gyeong-Gu Kang, G. Cho, Hyunsik Kim","doi":"10.23919/VLSICircuits52068.2021.9492478","DOIUrl":null,"url":null,"abstract":"This paper presents an always-dual-path (ADP) DC-DC converter that achieves 4.5V-input 0.3-to-1.7V-output buck conversion for battery-powered low-voltage SoCs. Regardless of voltage conversion ratio (VCR), the proposed ADP converter maintains the inductor current constantly to be ×0.5 of the load current, bringing high efficiency with a large DCR of the compact-volume inductor. Seamless dual-power-path formed by two flying-capacitors merits a low ripple. The chip fabricated in 180-nm 5V CMOS obtains an efficiency of 91.5% (84.6%) at a VCR of 0.38 (0.2) even with an inductor DCR of 250mΩ.","PeriodicalId":106356,"journal":{"name":"2021 Symposium on VLSI Circuits","volume":"120 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A 4.5V-Input 0.3-to-1.7V-Output Step-Down Always-Dual-Path DC-DC Converter Achieving 91.5%-Efficiency with 250mΩ-DCR Inductor for Low-Voltage SoCs\",\"authors\":\"Jaehwan Ko, Yeunhee Huh, Min-Woo Ko, Gyeong-Gu Kang, G. Cho, Hyunsik Kim\",\"doi\":\"10.23919/VLSICircuits52068.2021.9492478\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an always-dual-path (ADP) DC-DC converter that achieves 4.5V-input 0.3-to-1.7V-output buck conversion for battery-powered low-voltage SoCs. Regardless of voltage conversion ratio (VCR), the proposed ADP converter maintains the inductor current constantly to be ×0.5 of the load current, bringing high efficiency with a large DCR of the compact-volume inductor. Seamless dual-power-path formed by two flying-capacitors merits a low ripple. The chip fabricated in 180-nm 5V CMOS obtains an efficiency of 91.5% (84.6%) at a VCR of 0.38 (0.2) even with an inductor DCR of 250mΩ.\",\"PeriodicalId\":106356,\"journal\":{\"name\":\"2021 Symposium on VLSI Circuits\",\"volume\":\"120 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/VLSICircuits52068.2021.9492478\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSICircuits52068.2021.9492478","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 4.5V-Input 0.3-to-1.7V-Output Step-Down Always-Dual-Path DC-DC Converter Achieving 91.5%-Efficiency with 250mΩ-DCR Inductor for Low-Voltage SoCs
This paper presents an always-dual-path (ADP) DC-DC converter that achieves 4.5V-input 0.3-to-1.7V-output buck conversion for battery-powered low-voltage SoCs. Regardless of voltage conversion ratio (VCR), the proposed ADP converter maintains the inductor current constantly to be ×0.5 of the load current, bringing high efficiency with a large DCR of the compact-volume inductor. Seamless dual-power-path formed by two flying-capacitors merits a low ripple. The chip fabricated in 180-nm 5V CMOS obtains an efficiency of 91.5% (84.6%) at a VCR of 0.38 (0.2) even with an inductor DCR of 250mΩ.
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