H. Then, L. Chow, S. Dasgupta, S. Gardner, M. Radosavljevic, V. Rao, S. Sung, G. Yang, P. Fischer
{"title":"高k栅极介质耗尽模式和增强模式GaN mos - hemt用于改善off状态泄漏和DIBL用于电力电子和射频应用","authors":"H. Then, L. Chow, S. Dasgupta, S. Gardner, M. Radosavljevic, V. Rao, S. Sung, G. Yang, P. Fischer","doi":"10.1109/IEDM.2015.7409710","DOIUrl":null,"url":null,"abstract":"The characteristics of high-k gate dielectric depletion-mode and enhancement-mode GaN MOS-HEMTs is reviewed. High-k gate dielectric depletion-mode GaN MOS-HEMT with thin AlInN polarization layer of 2.5nm in the gate stack is shown to exhibit \"negative\" capacitance and steep SS<;40mV/dec [31], which may have implications for low-power electronics. Enhancement-mode operation is achieved by removing the AlInN polarization layer from the gate stack [31-36]. Excellent DIBL, low IOFF, low gate leakage, and low RON are achieved due to the scaled Toxe=23Å using high-k gate dielectric and N+ regrown InGaN source/drain [32]. The DIBL and IOFF-RON characteristics of the high-k enhancement-mode GaN MOS-HEMT [32] are the best reported for a GaN transistor. These characteristics make the high-k gate dielectric depletion-mode and enhancement-mode GaN MOS-HEMT attractive for power electronics and RF applications.","PeriodicalId":336637,"journal":{"name":"2015 IEEE International Electron Devices Meeting (IEDM)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"High-K gate dielectric depletion-mode and enhancement-mode GaN MOS-HEMTs for improved OFF-state leakage and DIBL for power electronics and RF applications\",\"authors\":\"H. Then, L. Chow, S. Dasgupta, S. Gardner, M. Radosavljevic, V. Rao, S. Sung, G. Yang, P. Fischer\",\"doi\":\"10.1109/IEDM.2015.7409710\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The characteristics of high-k gate dielectric depletion-mode and enhancement-mode GaN MOS-HEMTs is reviewed. High-k gate dielectric depletion-mode GaN MOS-HEMT with thin AlInN polarization layer of 2.5nm in the gate stack is shown to exhibit \\\"negative\\\" capacitance and steep SS<;40mV/dec [31], which may have implications for low-power electronics. Enhancement-mode operation is achieved by removing the AlInN polarization layer from the gate stack [31-36]. Excellent DIBL, low IOFF, low gate leakage, and low RON are achieved due to the scaled Toxe=23Å using high-k gate dielectric and N+ regrown InGaN source/drain [32]. The DIBL and IOFF-RON characteristics of the high-k enhancement-mode GaN MOS-HEMT [32] are the best reported for a GaN transistor. These characteristics make the high-k gate dielectric depletion-mode and enhancement-mode GaN MOS-HEMT attractive for power electronics and RF applications.\",\"PeriodicalId\":336637,\"journal\":{\"name\":\"2015 IEEE International Electron Devices Meeting (IEDM)\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE International Electron Devices Meeting (IEDM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2015.7409710\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Electron Devices Meeting (IEDM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2015.7409710","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
摘要
综述了高钾栅极介质耗尽模式和增强模式GaN mos - hemt的特性。高k栅极介质耗尽模式GaN MOS-HEMT在栅极堆叠中具有2.5nm的薄AlInN极化层,显示出“负”电容和陡峭的SS<;40mV/dec[31],这可能对低功耗电子产品具有影响。增强模式操作是通过从栅极堆叠中去除AlInN极化层来实现的[31-36]。优异的DIBL、低IOFF、低栅极泄漏和低RON是由于使用高k栅极电介质和N+再生的InGaN源/漏极实现了缩放后的Toxe=23Å[32]。高k增强模式GaN MOS-HEMT的DIBL和IOFF-RON特性[32]是GaN晶体管中报道得最好的。这些特性使得高k栅极介质耗尽模式和增强模式GaN MOS-HEMT在电力电子和射频应用中具有吸引力。
High-K gate dielectric depletion-mode and enhancement-mode GaN MOS-HEMTs for improved OFF-state leakage and DIBL for power electronics and RF applications
The characteristics of high-k gate dielectric depletion-mode and enhancement-mode GaN MOS-HEMTs is reviewed. High-k gate dielectric depletion-mode GaN MOS-HEMT with thin AlInN polarization layer of 2.5nm in the gate stack is shown to exhibit "negative" capacitance and steep SS<;40mV/dec [31], which may have implications for low-power electronics. Enhancement-mode operation is achieved by removing the AlInN polarization layer from the gate stack [31-36]. Excellent DIBL, low IOFF, low gate leakage, and low RON are achieved due to the scaled Toxe=23Å using high-k gate dielectric and N+ regrown InGaN source/drain [32]. The DIBL and IOFF-RON characteristics of the high-k enhancement-mode GaN MOS-HEMT [32] are the best reported for a GaN transistor. These characteristics make the high-k gate dielectric depletion-mode and enhancement-mode GaN MOS-HEMT attractive for power electronics and RF applications.