{"title":"一种可测试的高性能显示控制器(放射诊断设备)的实现","authors":"J. Bou-Farhat, R. Makki, M. Allen, D. Anthony","doi":"10.1109/SSST.1988.17119","DOIUrl":null,"url":null,"abstract":"A description is given of the testability features of a VLSI implementation of a high-performance display controller for diagnostic radiology. The design-for-test features cover 100% of the silicon area at a modest overhead. Boundary-scan, partitioning, and structured control sequencing are used to enhance the verifiability and testability of the IC.<<ETX>>","PeriodicalId":345412,"journal":{"name":"[1988] Proceedings. The Twentieth Southeastern Symposium on System Theory","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The implementation of a testable high performance display controller (diagnostic radiology equipment)\",\"authors\":\"J. Bou-Farhat, R. Makki, M. Allen, D. Anthony\",\"doi\":\"10.1109/SSST.1988.17119\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A description is given of the testability features of a VLSI implementation of a high-performance display controller for diagnostic radiology. The design-for-test features cover 100% of the silicon area at a modest overhead. Boundary-scan, partitioning, and structured control sequencing are used to enhance the verifiability and testability of the IC.<<ETX>>\",\"PeriodicalId\":345412,\"journal\":{\"name\":\"[1988] Proceedings. The Twentieth Southeastern Symposium on System Theory\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1988-03-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1988] Proceedings. The Twentieth Southeastern Symposium on System Theory\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SSST.1988.17119\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1988] Proceedings. The Twentieth Southeastern Symposium on System Theory","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SSST.1988.17119","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The implementation of a testable high performance display controller (diagnostic radiology equipment)
A description is given of the testability features of a VLSI implementation of a high-performance display controller for diagnostic radiology. The design-for-test features cover 100% of the silicon area at a modest overhead. Boundary-scan, partitioning, and structured control sequencing are used to enhance the verifiability and testability of the IC.<>