{"title":"具有变容管组的低功率、低相位噪声宽调谐LC压控振荡器","authors":"Shephali Singh, R. Gurjar","doi":"10.1109/RISE.2017.8378191","DOIUrl":null,"url":null,"abstract":"Thispaper presentedthe LC VCO design with varactor bank based on the selection of passive elements. A negative CMOS cross coupled pair is added to reduce losses and improves quality factor. This configuration is selected due to ease of oscillation and a relatively straight forward design approach. Tuning range is achieved from 9 band MOS varactor bank having low VCO gain. The PMOS varactors operating in inversion and depletion region which allow large tuning and less parasitic resistance. LC VCO has been implemented using SCL 0.18 pm CMOS technology. The proposed design achieves a wide tuning frequency from 4.3 GHz–6.8 GHz and a phase noise of −127.5dBc/Hz @ 1 MHz. The tuning range of proposed circuit is 45% andthe power consumption is 216 uW using 1.5 V supply voltage.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A low power, low phase noise wide tuning LC VCO with varactor bank\",\"authors\":\"Shephali Singh, R. Gurjar\",\"doi\":\"10.1109/RISE.2017.8378191\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Thispaper presentedthe LC VCO design with varactor bank based on the selection of passive elements. A negative CMOS cross coupled pair is added to reduce losses and improves quality factor. This configuration is selected due to ease of oscillation and a relatively straight forward design approach. Tuning range is achieved from 9 band MOS varactor bank having low VCO gain. The PMOS varactors operating in inversion and depletion region which allow large tuning and less parasitic resistance. LC VCO has been implemented using SCL 0.18 pm CMOS technology. The proposed design achieves a wide tuning frequency from 4.3 GHz–6.8 GHz and a phase noise of −127.5dBc/Hz @ 1 MHz. The tuning range of proposed circuit is 45% andthe power consumption is 216 uW using 1.5 V supply voltage.\",\"PeriodicalId\":166244,\"journal\":{\"name\":\"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RISE.2017.8378191\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RISE.2017.8378191","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low power, low phase noise wide tuning LC VCO with varactor bank
Thispaper presentedthe LC VCO design with varactor bank based on the selection of passive elements. A negative CMOS cross coupled pair is added to reduce losses and improves quality factor. This configuration is selected due to ease of oscillation and a relatively straight forward design approach. Tuning range is achieved from 9 band MOS varactor bank having low VCO gain. The PMOS varactors operating in inversion and depletion region which allow large tuning and less parasitic resistance. LC VCO has been implemented using SCL 0.18 pm CMOS technology. The proposed design achieves a wide tuning frequency from 4.3 GHz–6.8 GHz and a phase noise of −127.5dBc/Hz @ 1 MHz. The tuning range of proposed circuit is 45% andthe power consumption is 216 uW using 1.5 V supply voltage.