Peter T. Breuer, N. M. Madrid, L. Sánchez, Andrés Marín López, C. D. Kloos
{"title":"一种规范和细化实时系统的形式化方法","authors":"Peter T. Breuer, N. M. Madrid, L. Sánchez, Andrés Marín López, C. D. Kloos","doi":"10.1109/EMWRTS.1996.557891","DOIUrl":null,"url":null,"abstract":"A new formal method for the specification, of real-time system requirements and their refinement to a design architecture is set out here. This integrated method is derived from a recently developed formal semantics, logic and refinement calculus for the IEEE standard hardware specification language VHDL. The specification format consists of three-phase \"before, during and after\" logical schemas, and comes with a combinatorial schema calculus and a refinement theory. The look and feel is reminiscent of Z and VDM and is intended to present an \"upgrade path\" to real-time for users with specification skills in these languages.","PeriodicalId":262733,"journal":{"name":"Proceedings of the Eighth Euromicro Workshop on Real-Time Systems","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A formal method for specification and refinement of real-time systems\",\"authors\":\"Peter T. Breuer, N. M. Madrid, L. Sánchez, Andrés Marín López, C. D. Kloos\",\"doi\":\"10.1109/EMWRTS.1996.557891\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new formal method for the specification, of real-time system requirements and their refinement to a design architecture is set out here. This integrated method is derived from a recently developed formal semantics, logic and refinement calculus for the IEEE standard hardware specification language VHDL. The specification format consists of three-phase \\\"before, during and after\\\" logical schemas, and comes with a combinatorial schema calculus and a refinement theory. The look and feel is reminiscent of Z and VDM and is intended to present an \\\"upgrade path\\\" to real-time for users with specification skills in these languages.\",\"PeriodicalId\":262733,\"journal\":{\"name\":\"Proceedings of the Eighth Euromicro Workshop on Real-Time Systems\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the Eighth Euromicro Workshop on Real-Time Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EMWRTS.1996.557891\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Eighth Euromicro Workshop on Real-Time Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EMWRTS.1996.557891","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A formal method for specification and refinement of real-time systems
A new formal method for the specification, of real-time system requirements and their refinement to a design architecture is set out here. This integrated method is derived from a recently developed formal semantics, logic and refinement calculus for the IEEE standard hardware specification language VHDL. The specification format consists of three-phase "before, during and after" logical schemas, and comes with a combinatorial schema calculus and a refinement theory. The look and feel is reminiscent of Z and VDM and is intended to present an "upgrade path" to real-time for users with specification skills in these languages.
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