{"title":"一种用于UPS状态估计的定点数字滤波器的设计","authors":"K. Natarajan, S. Sivakumar","doi":"10.1109/CIPE.1994.396713","DOIUrl":null,"url":null,"abstract":"This paper describes an optimization procedure for the design of fixed-point digital filters for the high speed measurement of low frequency AC signals encountered in uninterruptible power supplies (UPS). The proposed procedure addresses the minimization of the noise effects due to roundoff, analog to digital conversion quantization and filter coefficient quantization together with filter performance requirements such as speed of response.<<ETX>>","PeriodicalId":123138,"journal":{"name":"Proceedings of 1994 IEEE Workshop on Computers in Power Electronics","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Design of a fixed-point digital filter for state estimation for UPS applications\",\"authors\":\"K. Natarajan, S. Sivakumar\",\"doi\":\"10.1109/CIPE.1994.396713\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes an optimization procedure for the design of fixed-point digital filters for the high speed measurement of low frequency AC signals encountered in uninterruptible power supplies (UPS). The proposed procedure addresses the minimization of the noise effects due to roundoff, analog to digital conversion quantization and filter coefficient quantization together with filter performance requirements such as speed of response.<<ETX>>\",\"PeriodicalId\":123138,\"journal\":{\"name\":\"Proceedings of 1994 IEEE Workshop on Computers in Power Electronics\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1994 IEEE Workshop on Computers in Power Electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CIPE.1994.396713\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 IEEE Workshop on Computers in Power Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CIPE.1994.396713","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of a fixed-point digital filter for state estimation for UPS applications
This paper describes an optimization procedure for the design of fixed-point digital filters for the high speed measurement of low frequency AC signals encountered in uninterruptible power supplies (UPS). The proposed procedure addresses the minimization of the noise effects due to roundoff, analog to digital conversion quantization and filter coefficient quantization together with filter performance requirements such as speed of response.<>
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