SimpleBP:用于有效设计探索的轻量级分支预测模拟器

Chaobing Zhou, Libo Huang, Zhisheng Li, Q. Dou
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引用次数: 0

摘要

在设计分支预测器时,除了要考虑预测的准确性外,还要考虑芯片面积占用和功耗。以往的许多预测仿真平台要么只考虑粗粒度更新模型计算的精度,要么只是低速的全系统仿真平台。本文提出了一种基于轨迹驱动的轻量级预测模拟器SimpleBP。它利用SystemC语言在时钟周期粒度上模拟分支预测器。并引入CACTI模型对面积和功耗进行评估。实验结果表明,SimpleBP可以准确地给出分支预测器的多个评价。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
SimpleBP: A Lightweight Branch Prediction Simulator for Effective Design Exploration
Besides the accuracy of prediction, chip area occupancy and power consumption also should be taken into account in the design of branch predictors. Many of the previous prediction simulation platforms have either only considered accuracy computed with coarse-grained updating model, or just been the low-speed full system simulators. In this paper, We presents SimpleBP, a lightweight prediction simulator based on trace driven. It leverages the SystemC language to simulate branch predictor at clock cycle granularity. And the CACTI model is introduced to evaluate area and power consumption. The experiment results show that SimpleBP can accurately give multiple evaluations of branch predictors.
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