High Detectivity in CMOS Substrate Powered Graphene p-i-n Junction

Sufficiently large depletion region for photocarrier generation and separation is a key factor for two-dimensional material optoelectronic devices, but few device configurations have been explored for a deterministic control of a space charge region area in graphene with convincing scalability. Here we investigate a graphene-silicon p-i-n photodiode defined in a foundry processed planar photonic crystal waveguide structure, achieving visible — near-infrared, zero-bias and ultrafast photodetection. Graphene is electrically contacting to the wide intrinsic region of silicon and extended to the p an n doped region, functioning as the primary photocarrier conducting channel for electronic gain. Graphene significantly improves the device speed through ultrafast out-of-plane interfacial carrier transfer and the following in-plane built-in electric field assisted carrier collection. More than 50 dB converted signal-to-noise ratio at 40 GHz has been demonstrated under zero bias voltage, with quantum efficiency could be further amplified by hot carrier gain on graphene-i Si interface and avalanche process on graphene-doped Si interface. The multi-junction structure on the hybrid structure is parameterized by fitting a small-signal model to the broadband coherent radio-frequency response of the hybrid device at a set of different carrier injection rates. By engineering the device dimensions, it is possible to suppress the resistance-capacitance delay being less than a picosecond and enable sub-Terahertz bandwidth operation. With the device architecture fully defined by nanomanufactured substrate, this study is the first demonstration of post-fabrication-free two-dimensional material active silicon photonic devices.