抑制载波时钟用于降低高速数字系统的电磁辐射发射

D. Kam, Jonghoon J. Kim, Joungho Kim, Piljung Jun
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引用次数: 1

摘要

在现代数字系统中,大部分的电磁辐射发射来自高速数字时钟信号。为了降低时钟信号的电磁辐射发射,采用扩频时钟。它通常是通过使用锁相环(PLL)或延迟锁相环(DLL)调制常规时钟的周期来实现的。然而,它们都不能用简单的电路来实现。为了克服这个问题,最近提出了抑制载波时钟(SCC),它通过有意跳过常规时钟的转换来实现。本文分析了调制剖面对抑制电磁辐射发射的影响。数值仿真结果表明,锯齿形调制在性能和可行性方面都是一种最优的调制方法。我们还提出了一个简单的电路调制和解调与锯齿调制轮廓的SCC。最后,我们在ALTERA芯片上实现了该电路,实现了6 dB的电磁辐射抑制。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Suppressed carrier clock for reduction of electromagnetic radiated emission from high-speed digital system
In modern digital systems, most of electromagnetic radiated emission originates from high-speed digital clock signal. In order to reduce the electromagnetic radiated emission from the clock signal, spread spectrum clock had been used. It had been conventionally realized by modulating the period of a regular clock, using a phase locked loop (PLL) or a delay locked loop (DLL). However, neither of them can be implemented with simple circuit. To overcome this, suppressed carrier clock (SCC) has been recently proposed, which is implemented by intentionally skipping transitions of a regular clock. In this paper, we analyze the effects of modulation profile on the suppression of electromagnetic radiated emission. Numerical simulation results show that saw-tooth modulation is an optimal method in terms of performance and feasibility. We also propose a simple circuit for modulation and demodulation of the SCC with the saw-tooth modulation profile. Finally, we implemented the proposed circuit on an ALTERA chip, and it achieves 6 dB suppression of electromagnetic radiated emission.
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