{"title":"混合信号系统设计:为芯片和系统设计人员开发的系统集成和封装课程","authors":"Lirong Zheng, H. Tenhunen","doi":"10.1109/ECTC.2002.1008310","DOIUrl":null,"url":null,"abstract":"This paper reports the development process and the updated information for the course Mixed Signal System Design, in the curriculums of system-on-chip master program and Ph.D. program in electronic system design at the Royal Institute of Technology (KTH), Stockholm, Sweden. The course aims to provide a unified view of physical system architectures from chip, circuit board, to cabinets. The course focuses on basic theory and analysis methods as well as design practice for high performance interconnections and packaging in such complex, mixed-signal end-products as mobile terminals and base-stations. Unlike many existing packaging courses, our course emphasizes physical performance constraints of interconnects and packaging and their dependencies on the underlying technologies, their impacts on the resulting system architectures and signal integrity. This is because our targeted students are chip and system designers rather than packaging experts. After this course, the students can choose an appropriate set of implementation technologies from semiconductor level to packaging and board level for their mixed signal end products, physically partition the system functionality across the packaging hierarchy with respect to mixed signal coupling constraints, perform physical performance estimation and trade-off analysis and define the appropriate physical architecture for system implementation.","PeriodicalId":285713,"journal":{"name":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Mixed signal system design: a system integration and packaging course developed for chip and system designers\",\"authors\":\"Lirong Zheng, H. Tenhunen\",\"doi\":\"10.1109/ECTC.2002.1008310\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper reports the development process and the updated information for the course Mixed Signal System Design, in the curriculums of system-on-chip master program and Ph.D. program in electronic system design at the Royal Institute of Technology (KTH), Stockholm, Sweden. The course aims to provide a unified view of physical system architectures from chip, circuit board, to cabinets. The course focuses on basic theory and analysis methods as well as design practice for high performance interconnections and packaging in such complex, mixed-signal end-products as mobile terminals and base-stations. Unlike many existing packaging courses, our course emphasizes physical performance constraints of interconnects and packaging and their dependencies on the underlying technologies, their impacts on the resulting system architectures and signal integrity. This is because our targeted students are chip and system designers rather than packaging experts. After this course, the students can choose an appropriate set of implementation technologies from semiconductor level to packaging and board level for their mixed signal end products, physically partition the system functionality across the packaging hierarchy with respect to mixed signal coupling constraints, perform physical performance estimation and trade-off analysis and define the appropriate physical architecture for system implementation.\",\"PeriodicalId\":285713,\"journal\":{\"name\":\"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.2002.1008310\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2002.1008310","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Mixed signal system design: a system integration and packaging course developed for chip and system designers
This paper reports the development process and the updated information for the course Mixed Signal System Design, in the curriculums of system-on-chip master program and Ph.D. program in electronic system design at the Royal Institute of Technology (KTH), Stockholm, Sweden. The course aims to provide a unified view of physical system architectures from chip, circuit board, to cabinets. The course focuses on basic theory and analysis methods as well as design practice for high performance interconnections and packaging in such complex, mixed-signal end-products as mobile terminals and base-stations. Unlike many existing packaging courses, our course emphasizes physical performance constraints of interconnects and packaging and their dependencies on the underlying technologies, their impacts on the resulting system architectures and signal integrity. This is because our targeted students are chip and system designers rather than packaging experts. After this course, the students can choose an appropriate set of implementation technologies from semiconductor level to packaging and board level for their mixed signal end products, physically partition the system functionality across the packaging hierarchy with respect to mixed signal coupling constraints, perform physical performance estimation and trade-off analysis and define the appropriate physical architecture for system implementation.