{"title":"一种开关电容阵列作为CMS前向介子室读出的模拟管道","authors":"F. Lin, R. Breedon, B. Holbrook, W. Ko","doi":"10.1109/NSSMIC.1995.510364","DOIUrl":null,"url":null,"abstract":"A switched capacitor array (SCA) application specific integrated circuit is being developed for the front-end readout of the forward muon chambers for the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider. The SCA design requires full analog wave sampling with 10-bit accuracy over a one volt range. The present SCA circuit was designed and simulated to approach these requirements. Several iterations of a prototype have been fabricated in the CMOS HP 1.2 /spl mu/m process. Test results are provided and major concerns related to SCA operation are discussed in detail. Suggested modifications for the next ASIC iteration are discussed.","PeriodicalId":409998,"journal":{"name":"1995 IEEE Nuclear Science Symposium and Medical Imaging Conference Record","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A switched capacitor array as an analog pipeline for the CMS forward muon chamber readout\",\"authors\":\"F. Lin, R. Breedon, B. Holbrook, W. Ko\",\"doi\":\"10.1109/NSSMIC.1995.510364\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A switched capacitor array (SCA) application specific integrated circuit is being developed for the front-end readout of the forward muon chambers for the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider. The SCA design requires full analog wave sampling with 10-bit accuracy over a one volt range. The present SCA circuit was designed and simulated to approach these requirements. Several iterations of a prototype have been fabricated in the CMOS HP 1.2 /spl mu/m process. Test results are provided and major concerns related to SCA operation are discussed in detail. Suggested modifications for the next ASIC iteration are discussed.\",\"PeriodicalId\":409998,\"journal\":{\"name\":\"1995 IEEE Nuclear Science Symposium and Medical Imaging Conference Record\",\"volume\":\"17 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1995 IEEE Nuclear Science Symposium and Medical Imaging Conference Record\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NSSMIC.1995.510364\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1995 IEEE Nuclear Science Symposium and Medical Imaging Conference Record","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NSSMIC.1995.510364","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
针对大型强子对撞机紧凑型介子螺线管(CMS)实验中正向介子腔的前端读出,研制了一种开关电容阵列(SCA)专用集成电路。SCA设计要求在一伏特范围内具有10位精度的全模拟波采样。目前的SCA电路是为了满足这些要求而设计和仿真的。在CMOS HP 1.2 /spl mu/m工艺中制造了原型的几次迭代。提供了测试结果,并详细讨论了与SCA操作相关的主要关注点。讨论了下一个ASIC迭代的建议修改。
A switched capacitor array as an analog pipeline for the CMS forward muon chamber readout
A switched capacitor array (SCA) application specific integrated circuit is being developed for the front-end readout of the forward muon chambers for the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider. The SCA design requires full analog wave sampling with 10-bit accuracy over a one volt range. The present SCA circuit was designed and simulated to approach these requirements. Several iterations of a prototype have been fabricated in the CMOS HP 1.2 /spl mu/m process. Test results are provided and major concerns related to SCA operation are discussed in detail. Suggested modifications for the next ASIC iteration are discussed.