{"title":"20ghz功率放大器的130纳米CMOS设计","authors":"M. Ferndahl, T. Johansson, H. Zirath","doi":"10.1109/EMICC.2008.4772277","DOIUrl":null,"url":null,"abstract":"Five different 20 GHz power amplifiers in 130 nm CMOS technology have been designed and characterized. The power amplifiers explore single versus cascode configuration, smaller versus larger transistor sizes, as well as the combination of two amplifiers using power splitters/combiners. A maximum output power of 63 mW at 20 GHz was achieved. Transistor level characterization using load pull measurements on 1 mm gate width transistors yielded 148 mW output power. These numbers are, to the authors' knowledge, the highest reported for CMOS above 10 GHz. Transistor modeling and layout for power amplifiers are also discussed.","PeriodicalId":344657,"journal":{"name":"2008 European Microwave Integrated Circuit Conference","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"20 GHz Power Amplifier Design in 130 nm CMOS\",\"authors\":\"M. Ferndahl, T. Johansson, H. Zirath\",\"doi\":\"10.1109/EMICC.2008.4772277\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Five different 20 GHz power amplifiers in 130 nm CMOS technology have been designed and characterized. The power amplifiers explore single versus cascode configuration, smaller versus larger transistor sizes, as well as the combination of two amplifiers using power splitters/combiners. A maximum output power of 63 mW at 20 GHz was achieved. Transistor level characterization using load pull measurements on 1 mm gate width transistors yielded 148 mW output power. These numbers are, to the authors' knowledge, the highest reported for CMOS above 10 GHz. Transistor modeling and layout for power amplifiers are also discussed.\",\"PeriodicalId\":344657,\"journal\":{\"name\":\"2008 European Microwave Integrated Circuit Conference\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 European Microwave Integrated Circuit Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EMICC.2008.4772277\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 European Microwave Integrated Circuit Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EMICC.2008.4772277","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Five different 20 GHz power amplifiers in 130 nm CMOS technology have been designed and characterized. The power amplifiers explore single versus cascode configuration, smaller versus larger transistor sizes, as well as the combination of two amplifiers using power splitters/combiners. A maximum output power of 63 mW at 20 GHz was achieved. Transistor level characterization using load pull measurements on 1 mm gate width transistors yielded 148 mW output power. These numbers are, to the authors' knowledge, the highest reported for CMOS above 10 GHz. Transistor modeling and layout for power amplifiers are also discussed.