基于FPGA不同输入输出标准的绿色数据处理器件设计

Diya Garg, K. Sharma, Anshu Singla
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引用次数: 2

摘要

在数据中心的现场可编程门阵列(fpga)上实现数据处理设备(DPDs),采用合适的输入/输出(IO)标准是一种有效的节能方法。本文采用Virtex 5 FPGA,采用65nm制程技术设计了一种高效功耗的浮点单元(FPU)作为DPD,并分析了其对不同IO标准下FPU功耗的影响。在Xilinx 14.1 ISE平台上,以Verilog作为硬件描述语言(HDL),在AMD X2150的工作频率1.9 GHz下进行性能分析。在所有报道的1.9 GHz FPU使用的IO标准中,使用低压数字控制阻抗e_15 (LVDCI_15)获得的结果显示功耗仅为2.169W。在1.9 GHz工作频率下,使用LVDCI_15代替SSTL_I (Stub-Series terminatedlogic_i)可节省39.44%的总功耗。LVDCI15最适合1.9 GHz的Virtex 5 FPGA实现dpd。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Designing a Green Data Processing Device using Different Input/Output Standards on FPGA
An effective way to save power is utilization of suitable Input/output (IO) standard with Data Processing Devices (DPDs) implemented on Field Programmable Gate Arrays (FPGAs) at data centers. In this work, a power efficient Floating Point Unit (FPU) as a DPD has been designed in 65nm process technology using Virtex 5 FPGA and its impact on the power consumption of FPU with different IO standards is presented. The performance was analyzed at 1.9 GHz frequency which is operating frequency of AMD X2150 using Verilog as hardware descriptive language (HDL) in Xilinx 14.1 ISE platform. Among all the reported IO standards used with FPU at 1.9 GHz, the results obtained with Low-Voltage Digitally Controlled Impedance_15 (LVDCI_15) shows power consumption of 2.169W only. Using LVDCI_15 instead of Stub-Series Terminated Logic_I (SSTL_I), saves 39.44% of total power at operating frequency of 1.9 GHz. LVDCI15 is best suitable with Virtex 5 FPGA at 1.9 GHz for implementation of DPDs.
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