{"title":"多路编程，交换和程序驻留优先在FACOM 230-60","authors":"M. Tsujigado","doi":"10.1145/1468075.1468109","DOIUrl":null,"url":null,"abstract":"FACOM 230-60 is a large size electronic digital computer developed by Fujitsu Limited. The system consists of 1) up to 2 processing units, 2) a 256k word (maximum) high speed core memory that operates at a 0.92 μ sec. cycle time, or at an effective cycle time of 0.15 μ sec. with 16 memory banks and 3) a 768k word (maximum) low speed core memory that operates at a 6.0 μ sec. cycle time, or at an effective cycle time of 1.0 μ sec. with 6 memory banks.","PeriodicalId":180876,"journal":{"name":"Proceedings of the April 30--May 2, 1968, spring joint computer conference","volume":"274 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1968-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Multiprogramming, swapping and program residence priority in the FACOM 230-60\",\"authors\":\"M. Tsujigado\",\"doi\":\"10.1145/1468075.1468109\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"FACOM 230-60 is a large size electronic digital computer developed by Fujitsu Limited. The system consists of 1) up to 2 processing units, 2) a 256k word (maximum) high speed core memory that operates at a 0.92 μ sec. cycle time, or at an effective cycle time of 0.15 μ sec. with 16 memory banks and 3) a 768k word (maximum) low speed core memory that operates at a 6.0 μ sec. cycle time, or at an effective cycle time of 1.0 μ sec. with 6 memory banks.\",\"PeriodicalId\":180876,\"journal\":{\"name\":\"Proceedings of the April 30--May 2, 1968, spring joint computer conference\",\"volume\":\"274 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1968-04-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the April 30--May 2, 1968, spring joint computer conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/1468075.1468109\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the April 30--May 2, 1968, spring joint computer conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1468075.1468109","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multiprogramming, swapping and program residence priority in the FACOM 230-60
FACOM 230-60 is a large size electronic digital computer developed by Fujitsu Limited. The system consists of 1) up to 2 processing units, 2) a 256k word (maximum) high speed core memory that operates at a 0.92 μ sec. cycle time, or at an effective cycle time of 0.15 μ sec. with 16 memory banks and 3) a 768k word (maximum) low speed core memory that operates at a 6.0 μ sec. cycle time, or at an effective cycle time of 1.0 μ sec. with 6 memory banks.
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