{"title":"能源高效切片的资源调整","authors":"P. Veitch, John J. Browne, Chris MacNamara","doi":"10.1109/ICIN51074.2021.9385531","DOIUrl":null,"url":null,"abstract":"This paper explores and validates resource tuning techniques in multi-core processors that maximise performance while realising energy efficiency of network slices. We demonstrate how Speed Select Technology Base Frequency (SST-BF) increases network throughput for telecoms workloads by 26% using high frequency cores versus lower frequency cores. A 15% increase is observed over the case where SST-BF is disabled, while yielding a corresponding increase in power of just 5% within the same overall Thermal Design Power (TDP). We explain how SST-BF can be used in conjunction with Cache Allocation Technology (CAT) and Memory Bandwidth Allocation (MBA) to deliver coordinated performance tuning with an observed overall improvement of 34%, while preempting and eliminating Noisy Neighbour interference between multi-tenanted workloads on the same x86 server. We also demonstrate how to link the locally applied resource slicing techniques available on the multi-core processor platform, to the diverse needs of end-to-end “energy-efficient” network slices.","PeriodicalId":347933,"journal":{"name":"2021 24th Conference on Innovation in Clouds, Internet and Networks and Workshops (ICIN)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Resource Tuning for Energy Efficient Slicing\",\"authors\":\"P. Veitch, John J. Browne, Chris MacNamara\",\"doi\":\"10.1109/ICIN51074.2021.9385531\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper explores and validates resource tuning techniques in multi-core processors that maximise performance while realising energy efficiency of network slices. We demonstrate how Speed Select Technology Base Frequency (SST-BF) increases network throughput for telecoms workloads by 26% using high frequency cores versus lower frequency cores. A 15% increase is observed over the case where SST-BF is disabled, while yielding a corresponding increase in power of just 5% within the same overall Thermal Design Power (TDP). We explain how SST-BF can be used in conjunction with Cache Allocation Technology (CAT) and Memory Bandwidth Allocation (MBA) to deliver coordinated performance tuning with an observed overall improvement of 34%, while preempting and eliminating Noisy Neighbour interference between multi-tenanted workloads on the same x86 server. We also demonstrate how to link the locally applied resource slicing techniques available on the multi-core processor platform, to the diverse needs of end-to-end “energy-efficient” network slices.\",\"PeriodicalId\":347933,\"journal\":{\"name\":\"2021 24th Conference on Innovation in Clouds, Internet and Networks and Workshops (ICIN)\",\"volume\":\"72 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 24th Conference on Innovation in Clouds, Internet and Networks and Workshops (ICIN)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICIN51074.2021.9385531\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 24th Conference on Innovation in Clouds, Internet and Networks and Workshops (ICIN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIN51074.2021.9385531","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper explores and validates resource tuning techniques in multi-core processors that maximise performance while realising energy efficiency of network slices. We demonstrate how Speed Select Technology Base Frequency (SST-BF) increases network throughput for telecoms workloads by 26% using high frequency cores versus lower frequency cores. A 15% increase is observed over the case where SST-BF is disabled, while yielding a corresponding increase in power of just 5% within the same overall Thermal Design Power (TDP). We explain how SST-BF can be used in conjunction with Cache Allocation Technology (CAT) and Memory Bandwidth Allocation (MBA) to deliver coordinated performance tuning with an observed overall improvement of 34%, while preempting and eliminating Noisy Neighbour interference between multi-tenanted workloads on the same x86 server. We also demonstrate how to link the locally applied resource slicing techniques available on the multi-core processor platform, to the diverse needs of end-to-end “energy-efficient” network slices.