基于瞬变电磁法的高级逻辑器件位错自动分析流程

Seon-Young Lee, Ilgyou Shin, Sung-Bo Shim, Alexander Schmidt, I. Jang, D. Kim
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引用次数: 0

摘要

建立了基于透射电子显微镜(TEM)的位错源/漏源(S/D)和接触形成过程自动流分析方法。基于先前开发的位错应力模型,实现了一种自动化方法,可以快速且无人为错误地提取位错核心位置及其对器件通道应力和电气性能的影响。这种方法使我们能够分析位错对先进逻辑器件S/D的影响,并优化结构和工艺条件。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
TEM based dislocation auto analysis flow of advanced logic devices
Automatic flow of transmission electron microscopy (TEM)-based dislocation analysis on Source/Drain (S/D) and contact formation process is developed. Based on the previously developed model of dislocation stress, an automated methodology is implemented that allows fast and human-error-free extraction of dislocation core position and its impact on the device channel stress and the electrical performance. This approach enables us to analyze the impact of dislocations in S/D of advanced logic devices and to optimize structure and process conditions.
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