S. Ehrich, R. Bertenburg, M. Agethen, A. Brennemann, W. Brockerhoff, F. Tegude
{"title":"用于直流参数和s参数仿真的一致和可扩展的PSPICE hfet模型","authors":"S. Ehrich, R. Bertenburg, M. Agethen, A. Brennemann, W. Brockerhoff, F. Tegude","doi":"10.1109/ICMTS.2002.1193173","DOIUrl":null,"url":null,"abstract":"For simulation of digital circuits realized in Direct Coupled FET Logic (DCFL) using depletion-type as well as enhancement-type Heterostructure-Field Effect Transistors (HFET) a consistent model that is able to describe both types of transistors is necessary. The developed analytical PSPICE model takes into account all relevant intrinsic and parasitic effects. This model can be used for dc- as well as rf-simulations and is scaleable with respect to gate-width as well as gate-length.","PeriodicalId":188074,"journal":{"name":"Proceedings of the 2002 International Conference on Microelectronic Test Structures, 2002. ICMTS 2002.","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A consistent and scalable PSPICE HFET-Model for DC- and S-parameter-simulation\",\"authors\":\"S. Ehrich, R. Bertenburg, M. Agethen, A. Brennemann, W. Brockerhoff, F. Tegude\",\"doi\":\"10.1109/ICMTS.2002.1193173\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For simulation of digital circuits realized in Direct Coupled FET Logic (DCFL) using depletion-type as well as enhancement-type Heterostructure-Field Effect Transistors (HFET) a consistent model that is able to describe both types of transistors is necessary. The developed analytical PSPICE model takes into account all relevant intrinsic and parasitic effects. This model can be used for dc- as well as rf-simulations and is scaleable with respect to gate-width as well as gate-length.\",\"PeriodicalId\":188074,\"journal\":{\"name\":\"Proceedings of the 2002 International Conference on Microelectronic Test Structures, 2002. ICMTS 2002.\",\"volume\":\"60 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-04-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2002 International Conference on Microelectronic Test Structures, 2002. ICMTS 2002.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMTS.2002.1193173\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2002 International Conference on Microelectronic Test Structures, 2002. ICMTS 2002.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.2002.1193173","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A consistent and scalable PSPICE HFET-Model for DC- and S-parameter-simulation
For simulation of digital circuits realized in Direct Coupled FET Logic (DCFL) using depletion-type as well as enhancement-type Heterostructure-Field Effect Transistors (HFET) a consistent model that is able to describe both types of transistors is necessary. The developed analytical PSPICE model takes into account all relevant intrinsic and parasitic effects. This model can be used for dc- as well as rf-simulations and is scaleable with respect to gate-width as well as gate-length.