{"title":"一种1070 pJ/b 169mb /s四核数字基带SoC，用于28nm FD-SOI中分布式和协作式大规模MIMO","authors":"H. Prabhu, Liang Liu, F. Sheikh, O. Edfors","doi":"10.23919/VLSICircuits52068.2021.9492455","DOIUrl":null,"url":null,"abstract":"A 2.2 mm2 full digital baseband SoC with four heterogeneous cores for 128-node 8-users distributed massive MIMO is presented. Two specialized DSPs perform rapid over-the-air synchronization within 0.1ms. A highly optimized 8-complex lane MIMO vector processor provides 4x hardware efficiency improvement over general-purpose processors. Circuit optimizations and the use of body-bias result in 1070 pJ/b measured energy at 169 Mb/s detection rate.","PeriodicalId":106356,"journal":{"name":"2021 Symposium on VLSI Circuits","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 1070 pJ/b 169 Mb/s Quad-core Digital Baseband SoC for Distributed and Cooperative Massive MIMO in 28 nm FD-SOI\",\"authors\":\"H. Prabhu, Liang Liu, F. Sheikh, O. Edfors\",\"doi\":\"10.23919/VLSICircuits52068.2021.9492455\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 2.2 mm2 full digital baseband SoC with four heterogeneous cores for 128-node 8-users distributed massive MIMO is presented. Two specialized DSPs perform rapid over-the-air synchronization within 0.1ms. A highly optimized 8-complex lane MIMO vector processor provides 4x hardware efficiency improvement over general-purpose processors. Circuit optimizations and the use of body-bias result in 1070 pJ/b measured energy at 169 Mb/s detection rate.\",\"PeriodicalId\":106356,\"journal\":{\"name\":\"2021 Symposium on VLSI Circuits\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/VLSICircuits52068.2021.9492455\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSICircuits52068.2021.9492455","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 1070 pJ/b 169 Mb/s Quad-core Digital Baseband SoC for Distributed and Cooperative Massive MIMO in 28 nm FD-SOI
A 2.2 mm2 full digital baseband SoC with four heterogeneous cores for 128-node 8-users distributed massive MIMO is presented. Two specialized DSPs perform rapid over-the-air synchronization within 0.1ms. A highly optimized 8-complex lane MIMO vector processor provides 4x hardware efficiency improvement over general-purpose processors. Circuit optimizations and the use of body-bias result in 1070 pJ/b measured energy at 169 Mb/s detection rate.
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