一种用于IEEE 802.11a WPAN应用的CMOS技术的泄流折叠上转换混频器和前置放大器级

2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks Pub Date : 2005-03-01 DOI:10.1109/RFIT.2005.1598902

H. Ramiah, T. Zainal, A. Zulklifi

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引用次数: 4

摘要

本文介绍了一种符合ieee802.11 a WPAN标准的两步发射机架构的3.5 ghz上转换混频器核心。该设计基于电流排水折叠架构。所介绍的混频器拓扑的主要优点是:高线性度和适度的转换功率增益。该混频器采用0.18-/spl mu/m CMOS技术设计，由1.8 v电源供电。集成的上转换器和前置放大器分别消耗来自1.8 v电源的5 mA和22 mA电流，显示4.73 dBm OIP3 (-1.74 dBm IIP3)和-9.41 dBm P1 dB，转换功率增益为5.65 dBm。

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A current-draining folded up-conversion mixer and pre-amplifier stage in a CMOS technology for IEEE 802.11a WPAN applications

This paper describes a 3.5-GHz up-conversion mixer core utilized in a two step transmitter architecture in compliant with IEEE 802.11a WPAN application. The design is based on current-draining folded architecture. The main advantage of the introduced mixer topology is: high linearity and moderate conversion power gain. The mixer is designed in a 0.18-/spl mu/m CMOS technology, operating from 1.8-V power supply. The integrated up-converter and preamplifier consumes 5 mA and 22 mA of current respectively from 1.8-V supply and shows 4.73-dBm OIP3 (-1.74-dBm IIP3) and -9.41-dBm P1 dB with 5.65 dBm of conversion power gain.

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2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks

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