{"title":"使用协议转换器构建硬件/软件接口","authors":"S. Qin, Z. Qiu, Jifeng He","doi":"10.1109/APAQS.2001.990012","DOIUrl":null,"url":null,"abstract":"Hardware/software partition is a critical phase in hardware/software co-design. The paper proposes a hybrid partitioning framework, in which we design a set of protocol converters to construct the interface component between the hardware and software components, and reuse the formerly well-built partitioning rules by introducing protocol converters and rewriting them for this hybrid framework. The hardware components generated by our partitioning process are coded directly in Verilog HDL, which will greatly facilitate the further compilation from it down to netlists.","PeriodicalId":145151,"journal":{"name":"Proceedings Second Asia-Pacific Conference on Quality Software","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Constructing hardware/software interface using protocol converters\",\"authors\":\"S. Qin, Z. Qiu, Jifeng He\",\"doi\":\"10.1109/APAQS.2001.990012\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Hardware/software partition is a critical phase in hardware/software co-design. The paper proposes a hybrid partitioning framework, in which we design a set of protocol converters to construct the interface component between the hardware and software components, and reuse the formerly well-built partitioning rules by introducing protocol converters and rewriting them for this hybrid framework. The hardware components generated by our partitioning process are coded directly in Verilog HDL, which will greatly facilitate the further compilation from it down to netlists.\",\"PeriodicalId\":145151,\"journal\":{\"name\":\"Proceedings Second Asia-Pacific Conference on Quality Software\",\"volume\":\"37 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-12-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Second Asia-Pacific Conference on Quality Software\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APAQS.2001.990012\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Second Asia-Pacific Conference on Quality Software","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APAQS.2001.990012","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Constructing hardware/software interface using protocol converters
Hardware/software partition is a critical phase in hardware/software co-design. The paper proposes a hybrid partitioning framework, in which we design a set of protocol converters to construct the interface component between the hardware and software components, and reuse the formerly well-built partitioning rules by introducing protocol converters and rewriting them for this hybrid framework. The hardware components generated by our partitioning process are coded directly in Verilog HDL, which will greatly facilitate the further compilation from it down to netlists.