Decoupling Capacitor Optimization for Flat $\mathrm{Z}$ PCB Power Distribution Networks

Power integrity applications suffer from the inability to precisely define the dynamic transient current. This has led to an increased interest in designing for a target impedance over a wide spectral bandwidth. Prior art has shown that a flat impedance design results in the lowest m V ripple excursion per Amp of step load. [1] This paper provides a simple method for estimating the required decoupling C for flat impedance. This method is then used to demonstrate the adverse effect of inductance in the PDN that requires an increase in the required total decoupling capacitance.