自测试VLSI电路的计算机辅助设计

J. Kalinowski, A. Albicki
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引用次数: 2

摘要

本文介绍了一种计算机辅助自检系统,它是一种设计VLSI电路自检的CAD工具。给定一个寄存器-传输级电路图和测试要求,CAST增加了电路的特性,使其能够自我测试。CAST程序的目标是在获得的设计中最大化内置测试硬件。他们给出了一个例子来说明CAST的设计过程。CAST系统可以很容易地扩展,以纳入其他高级BIST(内置自检)技术,如循环自检路径
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Computer-aided design of self-testable VLSI circuits
The authors present the computer-aided self-test system, a CAD tool for designing of self-testable VLSI circuits. Given a register-transfer-level circuit graph and test requirements, CAST augments the circuit with features that make it self-testable. The objective of the CAST procedures is to maximize built-in test hardware in obtained designs. They give an example that illustrates the CAST design process. The CAST system can be easily extended to incorporate other high-level BIST (built-in self-test) techniques, such as the circular self-test path.<>
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