{"title":"梯度自适应栅格联合处理滤波器的FPGA实现方法","authors":"Haibing Qi, Jianlan Feng, Song Sun","doi":"10.1109/ICSAP.2010.46","DOIUrl":null,"url":null,"abstract":"In this paper, the optimal parameters of sections and step is decided by the outcome of the astringency and stability of reflectance in gradient adaptive lattice filter. An adaptive gradient lattice joint processing model of 3 sections for noise cancellation was established and simulated using a variety of EDA tools in a FPGA chip. Behavior level, register transfer level and gate level simulation results show that the design method can transfer the mathematical model into circuit model efficiently, and the method is suitable for handling the complex signal processing system such as adaptive filter.","PeriodicalId":303366,"journal":{"name":"2010 International Conference on Signal Acquisition and Processing","volume":"101 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Method of FPGA Implementation for Gradient Adaptive Lattice Joint Processing Filter\",\"authors\":\"Haibing Qi, Jianlan Feng, Song Sun\",\"doi\":\"10.1109/ICSAP.2010.46\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, the optimal parameters of sections and step is decided by the outcome of the astringency and stability of reflectance in gradient adaptive lattice filter. An adaptive gradient lattice joint processing model of 3 sections for noise cancellation was established and simulated using a variety of EDA tools in a FPGA chip. Behavior level, register transfer level and gate level simulation results show that the design method can transfer the mathematical model into circuit model efficiently, and the method is suitable for handling the complex signal processing system such as adaptive filter.\",\"PeriodicalId\":303366,\"journal\":{\"name\":\"2010 International Conference on Signal Acquisition and Processing\",\"volume\":\"101 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-02-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International Conference on Signal Acquisition and Processing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSAP.2010.46\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Conference on Signal Acquisition and Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSAP.2010.46","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Method of FPGA Implementation for Gradient Adaptive Lattice Joint Processing Filter
In this paper, the optimal parameters of sections and step is decided by the outcome of the astringency and stability of reflectance in gradient adaptive lattice filter. An adaptive gradient lattice joint processing model of 3 sections for noise cancellation was established and simulated using a variety of EDA tools in a FPGA chip. Behavior level, register transfer level and gate level simulation results show that the design method can transfer the mathematical model into circuit model efficiently, and the method is suitable for handling the complex signal processing system such as adaptive filter.