用于LTE上行链路的eNodeB鲁棒频率跟踪环路

R. Rimini, J. Ma
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引用次数: 0

摘要

LTE(长期演进)等4G系统提供高达80mbps的上行数据速率,利用高阶调制(64-QAM)并引入空分多址(SDMA)来提高频谱效率。这些特点对调制解调器的频率和时间同步提出了严格的要求,以保证令人满意的性能。本文提出了一种简单而稳健的方案来估计eNodeB上每个用户的频率偏移。该算法利用非相干方法提供频率误差估计,从而与信道估计解耦。该估计可由eNodeB以“开环”方式使用,通过下行链路(DL)定时调整消息来纠正用户的本地振荡器频率,或以“闭环”方案(如频率跟踪回路(FTL))来迭代地减少测量误差波动。通过仿真研究了该估计器在开环配置下的性能,发现在AWGN信道中,该估计器的性能在Cramer-Rao界(CRB)的5%以内。在闭环工作模式下,本文提出的FTL利用时间和空间上的多径分集来减轻衰落的影响,因此在tu - 30kmh信道中,相对于完美的频率校正,性能差距小于0.3 dB。对开环和闭环进行了分析,以进一步了解算法并进行参数优化研究,从而促进设计过程。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Robust Frequency Tracking Loop at the eNodeB for LTE Uplink
4G systems like LTE (Long Term Evolution) provide an uplink data rate up to 80 Mbps, utilize higher order modulation (64-QAM) and introduce space division multiple access (SDMA) to improve spectral efficiency. These features pose stringent frequency and time synchronization requirements for the modem to guarantee satisfactory performance. This paper presents a simple yet robust scheme to estimate the frequency offset on a per user-basis at the eNodeB. The algorithm proposed utilizes a non-coherent method to provide frequency error estimation, hence decoupled from the channel estimator. This estimation can be used by the eNodeB in a "open loop" fashion to correct the user's local oscillator frequency via downlink (DL) timing adjustment messages or in a "closed loop" scheme such as frequency tracking loop (FTL) to iteratively reduce the measurement error fluctuations. The performance of the proposed estimator have been investigated in open loop configuration through simulations and found within 5% of Cramer-Rao bound (CRB) in AWGN channel. For closed loop operation mode, the presented FTL exploits multipath diversity in time and space to mitigate the effects of fading, thus showing less than 0.3 dB of performance gap with respect to perfect frequency correction in TU-30 kmh channel. Analysis is presented for both open loop and closed loop to provide further insights in the algorithm and to allow parameter optimization study, thus facilitating the design process.
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