基于FPGA的平方根协处理器

Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies Pub Date : 1996-09-02 DOI:10.1109/EURMIC.1996.546478

V. Tchoumatchenko, T. Vassileva, P. Gurov

{"title":"基于FPGA的平方根协处理器","authors":"V. Tchoumatchenko, T. Vassileva, P. Gurov","doi":"10.1109/EURMIC.1996.546478","DOIUrl":null,"url":null,"abstract":"We present an FPGA implementation of a non-restoring integer square-root algorithm, that uses estimates for result-digit selection and radix-2 redundant addition in recurrence. On-the-fly conversion of the result-digit and signed-digit adder/substractor are used to simplify the hardware realization. Modifications of the equations for th optimal use of Xilinx CLBs, and the necessary CLB resources for different bit-length calculations are outlined, for the XC3000 family.","PeriodicalId":311520,"journal":{"name":"Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A FPGA based square-root coprocessor\",\"authors\":\"V. Tchoumatchenko, T. Vassileva, P. Gurov\",\"doi\":\"10.1109/EURMIC.1996.546478\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present an FPGA implementation of a non-restoring integer square-root algorithm, that uses estimates for result-digit selection and radix-2 redundant addition in recurrence. On-the-fly conversion of the result-digit and signed-digit adder/substractor are used to simplify the hardware realization. Modifications of the equations for th optimal use of Xilinx CLBs, and the necessary CLB resources for different bit-length calculations are outlined, for the XC3000 family.\",\"PeriodicalId\":311520,\"journal\":{\"name\":\"Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-09-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EURMIC.1996.546478\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EURMIC.1996.546478","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 6

摘要

我们提出了一种非恢复整数平方根算法的FPGA实现，该算法使用估计进行结果位数选择和递归中的基数2冗余加法。为了简化硬件实现，采用了结果数和带符号数加减法的动态转换。本文概述了Xilinx CLB最佳使用方程的修改，以及XC3000系列中不同位长度计算所需的CLB资源。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

A FPGA based square-root coprocessor

We present an FPGA implementation of a non-restoring integer square-root algorithm, that uses estimates for result-digit selection and radix-2 redundant addition in recurrence. On-the-fly conversion of the result-digit and signed-digit adder/substractor are used to simplify the hardware realization. Modifications of the equations for th optimal use of Xilinx CLBs, and the necessary CLB resources for different bit-length calculations are outlined, for the XC3000 family.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies

自引率

0.00%

发文量