{"title":"一种LDMOS漏阻退化建模方法","authors":"H. Aoki, M. Shimasue","doi":"10.1109/RFIT.2018.8524107","DOIUrl":null,"url":null,"abstract":"A complete aging circuit simulation method using a drain resistance degradation model of laterally-diffused MOSFETs (LDMOS's) is presented. The drain resistance degradation caused by the hot electron injection (HCI) effect in the drain drift region has been formulated, and then implemented in SPICE. A practical circuit aging simulation procedure has been demonstrated with LDMOS measurements for a fundamental DC-DC converter circuit, effectively.","PeriodicalId":297122,"journal":{"name":"2018 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Drain Resistance Degradation Modeling Procedure of LDMOS's\",\"authors\":\"H. Aoki, M. Shimasue\",\"doi\":\"10.1109/RFIT.2018.8524107\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A complete aging circuit simulation method using a drain resistance degradation model of laterally-diffused MOSFETs (LDMOS's) is presented. The drain resistance degradation caused by the hot electron injection (HCI) effect in the drain drift region has been formulated, and then implemented in SPICE. A practical circuit aging simulation procedure has been demonstrated with LDMOS measurements for a fundamental DC-DC converter circuit, effectively.\",\"PeriodicalId\":297122,\"journal\":{\"name\":\"2018 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIT.2018.8524107\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIT.2018.8524107","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Drain Resistance Degradation Modeling Procedure of LDMOS's
A complete aging circuit simulation method using a drain resistance degradation model of laterally-diffused MOSFETs (LDMOS's) is presented. The drain resistance degradation caused by the hot electron injection (HCI) effect in the drain drift region has been formulated, and then implemented in SPICE. A practical circuit aging simulation procedure has been demonstrated with LDMOS measurements for a fundamental DC-DC converter circuit, effectively.