{"title":"用于无掺杂CMOS的可重构静电掺杂2.5栅极平面场效应晶体管","authors":"Tillmann A. Krauss, Frank Wessely, U. Schwalke","doi":"10.1109/DTIS.2018.8368567","DOIUrl":null,"url":null,"abstract":"In this paper, we demonstrate by extending TCAD simulations based on experimental data of fabricated electrostatically doped, reconfigurable planar double-gate field-effect transistors, the improved characteristics of a triple gate device design. The technological cornerstones for this general-purpose FET comprise mid-gap Schottky S/D junctions on a silicon-on-insulator substrate. The transistor type, i.e. n-type or p-type, is interchangeable during operation by applying a control-gate voltage which significantly increases the flexibility and versatility in the design of integrated circuits.","PeriodicalId":328650,"journal":{"name":"2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-04-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Reconfigurable electrostatically doped 2.5-gate planar field-effect transistors for dopant-free CMOS\",\"authors\":\"Tillmann A. Krauss, Frank Wessely, U. Schwalke\",\"doi\":\"10.1109/DTIS.2018.8368567\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we demonstrate by extending TCAD simulations based on experimental data of fabricated electrostatically doped, reconfigurable planar double-gate field-effect transistors, the improved characteristics of a triple gate device design. The technological cornerstones for this general-purpose FET comprise mid-gap Schottky S/D junctions on a silicon-on-insulator substrate. The transistor type, i.e. n-type or p-type, is interchangeable during operation by applying a control-gate voltage which significantly increases the flexibility and versatility in the design of integrated circuits.\",\"PeriodicalId\":328650,\"journal\":{\"name\":\"2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)\",\"volume\":\"110 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-04-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DTIS.2018.8368567\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2018.8368567","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Reconfigurable electrostatically doped 2.5-gate planar field-effect transistors for dopant-free CMOS
In this paper, we demonstrate by extending TCAD simulations based on experimental data of fabricated electrostatically doped, reconfigurable planar double-gate field-effect transistors, the improved characteristics of a triple gate device design. The technological cornerstones for this general-purpose FET comprise mid-gap Schottky S/D junctions on a silicon-on-insulator substrate. The transistor type, i.e. n-type or p-type, is interchangeable during operation by applying a control-gate voltage which significantly increases the flexibility and versatility in the design of integrated circuits.