45纳米SOI CMOS低功耗k波段LNA

V. Issakov, R. Ciocoveanu
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引用次数: 2

摘要

本文提出了一种采用45 nm绝缘体上硅(SOI) CMOS技术实现的低功耗k波段单级级串级低噪声放大器(LNA)。该电路采用抽头电感谐振器进行阻抗变换,同时实现高增益和良好的输出匹配。此外,由于仔细的地板规划和拟议的电感端子布置,互连损耗被最小化。在中心频率为20.5 GHz时,放大器的增益为10.7 dB,噪声系数为1.6 dB。该电路实现了15- 27ghz的宽3db带宽和10.3 dBm的线性度,输入参考1db压缩点。LNA从单个1v电源中仅消耗6ma。包括衬垫在内的芯片尺寸仅为0.18 mm2。与目前的技术水平相比,所展示的LNA实现了非常有竞争力的性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Low-Power K-Band LNA in 45 nm SOI CMOS
This work presents a low-power K-band single stage cascode low-noise amplifier (LNA) realized in a 45 nm silicon-on-insulator (SOI) CMOS technology. The circuit uses a tapped-inductor resonator for impedance transformation to achieve simultaneously high gain and good output matching. Furthermore, thanks to a careful floorplaning and the proposed arrangement of inductor terminals, the interconnect losses are minimized. The amplifier achieves a gain of 10.7 dB and a noise Figure of 1.6 dB at the center frequency of 20.5 GHz. The circuit achieves a wide 3 dB bandwidth of 15-27 GHz and a linearity of 10.3 dBm input-referred 1 dB compression point. The LNA consumes only 6 mA from a single 1 V supply. The chip size including the pads is only 0.18 mm2. The presented LNA achieves a very competitive performance compared to the state of the art.
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