纠错码实现的可靠性[IC可靠性评估]

M. Shooman
{"title":"纠错码实现的可靠性[IC可靠性评估]","authors":"M. Shooman","doi":"10.1109/RAMS.1996.500655","DOIUrl":null,"url":null,"abstract":"This paper develops the probability of error expressions for parity bit codes and a single error correcting-single error detecting code, SECSED. A typical coding and decoding circuit involving standard ICs is developed for a parity bit code and a SECSED code. An expression was developed for the probability of undetected errors based on multiple bit errors or coder chip failure. Under certain conditions of bit transmission rate, B, and bit error probability, q, the simpler parity bit coding scheme is superior to the more complex Hamming code scheme. The general conclusion is that for more complex error detection schemes, one should evaluate the effects of generator and checker failures, since these may be of considerable importance for small values of q.","PeriodicalId":393833,"journal":{"name":"Proceedings of 1996 Annual Reliability and Maintainability Symposium","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1996-01-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"The reliability of error correcting code implementations [IC reliability assessment]\",\"authors\":\"M. Shooman\",\"doi\":\"10.1109/RAMS.1996.500655\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper develops the probability of error expressions for parity bit codes and a single error correcting-single error detecting code, SECSED. A typical coding and decoding circuit involving standard ICs is developed for a parity bit code and a SECSED code. An expression was developed for the probability of undetected errors based on multiple bit errors or coder chip failure. Under certain conditions of bit transmission rate, B, and bit error probability, q, the simpler parity bit coding scheme is superior to the more complex Hamming code scheme. The general conclusion is that for more complex error detection schemes, one should evaluate the effects of generator and checker failures, since these may be of considerable importance for small values of q.\",\"PeriodicalId\":393833,\"journal\":{\"name\":\"Proceedings of 1996 Annual Reliability and Maintainability Symposium\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-01-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1996 Annual Reliability and Maintainability Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RAMS.1996.500655\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1996 Annual Reliability and Maintainability Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RAMS.1996.500655","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

本文发展了奇偶位码和单纠错单检错码SECSED的错误概率表达式。针对奇偶位码和SECSED码,设计了一种典型的编码和解码电路。建立了基于多比特错误或编码器芯片故障的未检测错误概率表达式。在一定的比特传输率B和误码概率q的条件下,简单的奇偶位编码方案优于复杂的汉明码方案。总的结论是,对于更复杂的错误检测方案,应该评估生成器和检查器故障的影响,因为这些对于q的小值可能相当重要。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The reliability of error correcting code implementations [IC reliability assessment]
This paper develops the probability of error expressions for parity bit codes and a single error correcting-single error detecting code, SECSED. A typical coding and decoding circuit involving standard ICs is developed for a parity bit code and a SECSED code. An expression was developed for the probability of undetected errors based on multiple bit errors or coder chip failure. Under certain conditions of bit transmission rate, B, and bit error probability, q, the simpler parity bit coding scheme is superior to the more complex Hamming code scheme. The general conclusion is that for more complex error detection schemes, one should evaluate the effects of generator and checker failures, since these may be of considerable importance for small values of q.
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