65nm CMOS汽车雷达w波段超低功率次谐波混频器

2013 IEEE International Conference of IEEE Region 10 (TENCON 2013) Pub Date : 2013-12-01 DOI:10.1109/TENCON.2013.6718852

Xin Yang, Wei Wang, Kangyang Xu, T. Shibata, T. Yoshimasu

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引用次数: 0

摘要

本文提出了一种用于w波段汽车雷达的新型亚谐波混频器拓扑结构，该拓扑结构采用65nm CMOS技术。通过物理布局和电磁仿真，对三种拓扑的工作原理和性能进行了分析和讨论。仿真结果表明，在射频频率为79.0001 GHz，本端频率为39.5 GHz时，双频带噪声系数为20.8 dB，电压转换增益为-8.7 dB。直流功耗仅为10.4μW。

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W-band ultra-low-power sub-harmonic mixer for automotive radar in 65nm CMOS

This paper presents novel sub-harmonic mixer topologies for W-band automotive radar applications in 65nm CMOS technology. Working principle and performance of three kinds of topologies are analyzed and discussed with physical layout and EM simulation. The simulated performance shows a double side band noise figure of 20.8 dB and a voltage conversion gain of -8.7 dB at an RF frequency of 79.0001 GHz and a LO frequency of 39.5 GHz. The dc power consumption is only 10.4μW.

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2013 IEEE International Conference of IEEE Region 10 (TENCON 2013)

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