{"title":"异构集成的重构晶圆技术","authors":"E. Quevy, R. Howe, T. King","doi":"10.1109/MEMSYS.2006.1627796","DOIUrl":null,"url":null,"abstract":"This paper reports a novel method for heterogeneous integration by re-embedding diced chips into a carrier wafer. We rely on capillary forces to register embedded chips to their carrier with sub-micron accuracy, as well as on a novel sedimentation method to solidly seal the chips into the carrier. By creating a CMOS-clean reconstituted wafer ready for subsequent process steps, this approach enables the integration of technologies that were originally incompatible in terms of substrate material, substrate size, and/or thermal budget, while retaining the benefits of batch processing.","PeriodicalId":250831,"journal":{"name":"19th IEEE International Conference on Micro Electro Mechanical Systems","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Reconstituted Wafer Technology for Heterogeneous Integration\",\"authors\":\"E. Quevy, R. Howe, T. King\",\"doi\":\"10.1109/MEMSYS.2006.1627796\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper reports a novel method for heterogeneous integration by re-embedding diced chips into a carrier wafer. We rely on capillary forces to register embedded chips to their carrier with sub-micron accuracy, as well as on a novel sedimentation method to solidly seal the chips into the carrier. By creating a CMOS-clean reconstituted wafer ready for subsequent process steps, this approach enables the integration of technologies that were originally incompatible in terms of substrate material, substrate size, and/or thermal budget, while retaining the benefits of batch processing.\",\"PeriodicalId\":250831,\"journal\":{\"name\":\"19th IEEE International Conference on Micro Electro Mechanical Systems\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-05-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"19th IEEE International Conference on Micro Electro Mechanical Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MEMSYS.2006.1627796\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"19th IEEE International Conference on Micro Electro Mechanical Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MEMSYS.2006.1627796","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Reconstituted Wafer Technology for Heterogeneous Integration
This paper reports a novel method for heterogeneous integration by re-embedding diced chips into a carrier wafer. We rely on capillary forces to register embedded chips to their carrier with sub-micron accuracy, as well as on a novel sedimentation method to solidly seal the chips into the carrier. By creating a CMOS-clean reconstituted wafer ready for subsequent process steps, this approach enables the integration of technologies that were originally incompatible in terms of substrate material, substrate size, and/or thermal budget, while retaining the benefits of batch processing.