Design of high-speed parallel arithmetic algorithms and architectures

Presents an algorithm for computing a sum of products, realizing a fundamental compound multiply-and-add operation of high-speed arithmetic. Two new cellular pipelined algorithms and architectures (2D and 3D) are proposed. The initial data and results are binary signed-digit integers. The multipliers are loaded digit-serially, while the multiplicands are loaded in a digit-parallel fashion and the results are produced in the same way. The design is performed in terms of cellular technology, based on an original model of distributed computation (the parallel substitution algorithm). The time- and structural complexity is obtained.