一个1.2V抗干扰,直流偏置校准CMOS接收器,利用电流模式滤波器用于超宽带

Horng-Yuan Shih, Wei-Hsien Chen, K. Juang, Tzu-Yi Yang, C. Kuo
{"title":"一个1.2V抗干扰,直流偏置校准CMOS接收器,利用电流模式滤波器用于超宽带","authors":"Horng-Yuan Shih, Wei-Hsien Chen, K. Juang, Tzu-Yi Yang, C. Kuo","doi":"10.1109/ASSCC.2008.4708798","DOIUrl":null,"url":null,"abstract":"An interference-sturdiness receiver with a current-mode filter for 3-5 GHz UWB applications is implemented in a 1.2V 0.13 mum CMOS process. The chip provides a maximum voltage gain of 70 dB and a dynamic range of 60 dB. The measured in-band OIP3 is +9.39 dBm, out-of-band IIP3 -15 dBm and noise figure 6.8 dB in the maximum gain mode. An algorithm for the automatic digital DC offset calibration is also demonstrated.","PeriodicalId":143173,"journal":{"name":"2008 IEEE Asian Solid-State Circuits Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2008-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 1.2V interference-sturdiness, DC-offset calibrated CMOS receiver utilizing a current-mode filter for UWB\",\"authors\":\"Horng-Yuan Shih, Wei-Hsien Chen, K. Juang, Tzu-Yi Yang, C. Kuo\",\"doi\":\"10.1109/ASSCC.2008.4708798\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An interference-sturdiness receiver with a current-mode filter for 3-5 GHz UWB applications is implemented in a 1.2V 0.13 mum CMOS process. The chip provides a maximum voltage gain of 70 dB and a dynamic range of 60 dB. The measured in-band OIP3 is +9.39 dBm, out-of-band IIP3 -15 dBm and noise figure 6.8 dB in the maximum gain mode. An algorithm for the automatic digital DC offset calibration is also demonstrated.\",\"PeriodicalId\":143173,\"journal\":{\"name\":\"2008 IEEE Asian Solid-State Circuits Conference\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-12-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE Asian Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2008.4708798\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2008.4708798","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

采用1.2V 0.13 μ m CMOS工艺实现了一种具有3-5 GHz超宽带应用的电流模式滤波器的抗干扰接收器。该芯片的最大电压增益为70db,动态范围为60db。在最大增益模式下,测量到的带内OIP3为+9.39 dBm,带外IIP3为-15 dBm,噪声系数为6.8 dB。给出了一种自动数字直流偏置校正算法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 1.2V interference-sturdiness, DC-offset calibrated CMOS receiver utilizing a current-mode filter for UWB
An interference-sturdiness receiver with a current-mode filter for 3-5 GHz UWB applications is implemented in a 1.2V 0.13 mum CMOS process. The chip provides a maximum voltage gain of 70 dB and a dynamic range of 60 dB. The measured in-band OIP3 is +9.39 dBm, out-of-band IIP3 -15 dBm and noise figure 6.8 dB in the maximum gain mode. An algorithm for the automatic digital DC offset calibration is also demonstrated.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信