Design of CMOS LNA with the Inversion Coefficient

The design space of two 130 nm CMOS Low Noise Amplifiers (LNA) is explored with the EKV model. More specifically the gain, the noise figure and the input impedance are described with the Inversion Coefficient. This approach allows to work out the relevant sizing and bias conditions for each LNA topology. The first LNA, dedicated to 2.4 GHz low power applications, consumes $80~\mu W$. It achieves a voltage gain of 13.8 dB and a noise figure of 5.1 dB. The second LNA, dedicated to multi-standard applications, consumes $3.1~mW$ and covers a bandwidth of 2.1 GHz. The voltage gain is 19.2 dB and the minimum noise figure is $2.4~dB$.