基于循环神经网络量子纠错的嵌入式存储技术的低温基准

Panni Wang, Xiaochen Peng, W. Chakraborty, A. Khan, S. Datta, Shimeng Yu
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引用次数: 6

摘要

即使在深低温~20毫凯文下,量子比特也是脆弱的,因此需要一个反馈回路来执行量子纠错(QEC)。为了最大限度地减少物理量子比特和外围控制电路之间的热传递,在4K下操作QEC是非常理想的。在这项工作中,我们提出使用基于内存计算(CIM)的递归神经网络加速器在4K下实现表面代码QEC电路。为了实现这一目的,我们开发了Cryo-NeuroSim,这是一个设备到系统的建模框架,可以在低温下用实验数据校准晶体管和互连参数。然后我们用SRAM技术对QEC电路进行了基准测试,并利用重新设计的阈值电压和电源电压对其能量延迟积(EDP)进行了优化。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Cryogenic Benchmarks of Embedded Memory Technologies for Recurrent Neural Network based Quantum Error Correction
Even at deep cryogenic temperature ~20 milli-Kevin, the qubit is fragile, therefore a feedback loop is needed to perform the quantum error correction (QEC). It is highly desirable to operate the QEC at 4K to minimize the thermal heat transfer between the physical qubits and the peripheral control circuitry. In this work, we propose implementing the surface code QEC circuitry with compute-in-memory (CIM) based recurrent neural network accelerator at 4K. To serve this purpose, we develop Cryo-NeuroSim, a device-to-system modeling framework that calibrate the transistor and interconnect parameters with experimental data at cryogenic temperature. Then we benchmark the QEC circuitry with SRAM technologies and optimize its energy-delay-product (EDP) with reengineered threshold voltage and supply voltage.
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