用Petri网模型分析多进程VHDL规范

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference Pub Date : 1993-09-20 DOI:10.1109/EURDAC.1993.410679

J. Muller, H. Kramer

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引用次数: 11

摘要

提出了一种分析用于优化系统级综合的行为多进程VHDL规范的方法。为了确定对全局数据信号的访问冲突，必须分析系统行为。因此，同步方案被建模为一个Petri网，可以通过变换最小化。将简化图看作是系统状态的状态转移图。为了计算访问冲突的概率，必须确定观察到系统处于某种状态的概率。这是通过计算马尔可夫链的平稳分布来实现的

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Analysis of multi-process VHDL specifications with a Petri net model

A method for analyzing behavioral multiprocess VHDL specifications used for optimizing system-level synthesis is presented. To determine the access conflicts to the global data signals, the system behavior must be analyzed. Therefore the synchronization scheme is modeled as a Petri net, which can be minimized by transformation. A reduced case graph is regarded as a state transition graph of the system states. To calculate the probabilities of the access conflicts, the probability of observing the system in a certain state must be determined. This is done by calculation of the stationary distribution of a Markov chain.<>

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来源期刊

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference

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