Tianli Zhang, Yuefeng Cao, Shumin Zhang, Chixiao Chen, Fan Ye, Junyan Ren
{"title":"基于机器学习的开环分路管道sar adc无先验知识校准实现93.7 db SFDR","authors":"Tianli Zhang, Yuefeng Cao, Shumin Zhang, Chixiao Chen, Fan Ye, Junyan Ren","doi":"10.1109/ESSCIRC.2019.8902873","DOIUrl":null,"url":null,"abstract":"The paper presents a machine-learning based calibration scheme for split pipelined-SAR ADCs with open-loop residual amplifiers. Different from conventional methods, the proposed scheme is prior-knowledge-free. The scheme adopts a two-layer neural network, and directly uses the bit-wise comparator results as inputs. The neural network compensates the distortion and can be compressed by 75% due to the network’s sparsity. A 14-bit 60-MSps split pipelined-SAR ADC with gain boosted dynamic amplifiers is fabricated in 28nm CMOS to validate the scheme. The measurement results show the ADC achieves an SFDR of 93.7 dB and an ENOB of 10.7b, consuming 2.79 mW. To the authors’ knowledge, it achieves the best SFDR among Nyquist ADCs with open-loop amplifiers.","PeriodicalId":402948,"journal":{"name":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","volume":"127 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Machine Learning Based Prior-Knowledge-Free Calibration for Split Pipelined-SAR ADCs with Open-Loop Amplifiers Achieving 93.7-dB SFDR\",\"authors\":\"Tianli Zhang, Yuefeng Cao, Shumin Zhang, Chixiao Chen, Fan Ye, Junyan Ren\",\"doi\":\"10.1109/ESSCIRC.2019.8902873\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper presents a machine-learning based calibration scheme for split pipelined-SAR ADCs with open-loop residual amplifiers. Different from conventional methods, the proposed scheme is prior-knowledge-free. The scheme adopts a two-layer neural network, and directly uses the bit-wise comparator results as inputs. The neural network compensates the distortion and can be compressed by 75% due to the network’s sparsity. A 14-bit 60-MSps split pipelined-SAR ADC with gain boosted dynamic amplifiers is fabricated in 28nm CMOS to validate the scheme. The measurement results show the ADC achieves an SFDR of 93.7 dB and an ENOB of 10.7b, consuming 2.79 mW. To the authors’ knowledge, it achieves the best SFDR among Nyquist ADCs with open-loop amplifiers.\",\"PeriodicalId\":402948,\"journal\":{\"name\":\"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)\",\"volume\":\"127 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2019.8902873\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2019.8902873","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Machine Learning Based Prior-Knowledge-Free Calibration for Split Pipelined-SAR ADCs with Open-Loop Amplifiers Achieving 93.7-dB SFDR
The paper presents a machine-learning based calibration scheme for split pipelined-SAR ADCs with open-loop residual amplifiers. Different from conventional methods, the proposed scheme is prior-knowledge-free. The scheme adopts a two-layer neural network, and directly uses the bit-wise comparator results as inputs. The neural network compensates the distortion and can be compressed by 75% due to the network’s sparsity. A 14-bit 60-MSps split pipelined-SAR ADC with gain boosted dynamic amplifiers is fabricated in 28nm CMOS to validate the scheme. The measurement results show the ADC achieves an SFDR of 93.7 dB and an ENOB of 10.7b, consuming 2.79 mW. To the authors’ knowledge, it achieves the best SFDR among Nyquist ADCs with open-loop amplifiers.