{"title":"透明光网络的硬件加速损伤感知波长分配","authors":"A. Murali, N. Zulkifli, K. Guild","doi":"10.1109/PS.2008.4804191","DOIUrl":null,"url":null,"abstract":"This paper reports results of an ultra-fast control plane that utilises hardware-acceleration to solve part of an impairment-aware routing and wavelength assignment algorithm for heterogeneous optical networks. The implementation incorporates vector representation of physical layer impairments and outperforms its software counterpart by exploiting the speed and inherent parallelism offered by field programmable gate array's (FPGAs). The technique is applicable to both one- and two-way reservation schemes.","PeriodicalId":113046,"journal":{"name":"2008 International Conference on Photonics in Switching","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Hardware-accelerated impairment-aware Wavelength Assignment for transparent optical networks\",\"authors\":\"A. Murali, N. Zulkifli, K. Guild\",\"doi\":\"10.1109/PS.2008.4804191\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper reports results of an ultra-fast control plane that utilises hardware-acceleration to solve part of an impairment-aware routing and wavelength assignment algorithm for heterogeneous optical networks. The implementation incorporates vector representation of physical layer impairments and outperforms its software counterpart by exploiting the speed and inherent parallelism offered by field programmable gate array's (FPGAs). The technique is applicable to both one- and two-way reservation schemes.\",\"PeriodicalId\":113046,\"journal\":{\"name\":\"2008 International Conference on Photonics in Switching\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 International Conference on Photonics in Switching\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PS.2008.4804191\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 International Conference on Photonics in Switching","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PS.2008.4804191","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hardware-accelerated impairment-aware Wavelength Assignment for transparent optical networks
This paper reports results of an ultra-fast control plane that utilises hardware-acceleration to solve part of an impairment-aware routing and wavelength assignment algorithm for heterogeneous optical networks. The implementation incorporates vector representation of physical layer impairments and outperforms its software counterpart by exploiting the speed and inherent parallelism offered by field programmable gate array's (FPGAs). The technique is applicable to both one- and two-way reservation schemes.