QRD加速器的跨层优化

U. Vishnoi, T. Noll
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引用次数: 10

摘要

QR分解加速器是许多应用中有吸引力的SoC组件。提出了一种基于给定算法和坐标旋转数字计算机(CORDIC)旋转的新型线性QRD阵列。为了达到高的面积和能源效率,必须进行系统的设计空间探索。因此,必须考虑结构、微结构和电路级之间的强相互作用。基于架构模板和基本构建块的预表征,提出了一个代数成本模型,允许在合理的时间内以足够的精度进行跨层设计空间探索。通过这种定量优化方法,可以得到一个16×16-QRD宏,在0.3 mm2的面积上每秒执行3000万个QRD,每QRD执行160 pJ。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Cross-layer optimization of QRD accelerators
QR decomposition accelerators are attractive SoC components for many applications. A new linear QRD array is proposed based on the Givens-algorithm and CORDIC (Coordinate Rotate Digital Computer) rotations. In order to achieve high area- and energy-efficiency a systematic design space exploration has to be applied. Thereby the strong interactions between the architecture, micro-architecture and circuit level have to be considered. Based on architecture templates and pre-characterization of basic building blocks an algebraic cost-model is presented allowing for a cross-layer design space exploration with adequate accuracy in reasonable time. As a result from this quantitative optimization approach, a 16×16-QRD macro performing 30 million QRDs per second on 0.3 mm2 area and 160 pJ per QRD is derived.
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