nMOS通路晶体管逻辑方式与CMOS互补单元的比较

Proceedings International Conference on Computer Design VLSI in Computers and Processors Pub Date : 1997-10-12 DOI:10.1109/ICCD.1997.628859

R. Mehrotra, Massoud Pedram, Xunwei Wu

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引用次数: 7

摘要

本文比较了三种不同的逻辑风格实现任意布尔函数的三个输入，在其布局面积，延迟和功耗方面。这三种设计风格分别是基于nMOS通管的设计、基于NAND栅极的设计和CMOS互补逻辑的设计。比较结果表明，基于通型晶体管的设计优于基于NAND的设计，但逊于CMOS互补逻辑设计。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Comparison between nMOS pass transistor logic style vs. CMOS complementary cells

This paper compares three different logic styles for implementing arbitrary Boolean functions of up to three inputs in terms of their layout area, delay and power dissipation. The three styles are nMOS pass transistor based design, NAND gate based design, and CMOS complementary logic design. Results of the comparison show that pass transistor based design is superior to NAND based design, but loses to CMOS complementary logic design.

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Proceedings International Conference on Computer Design VLSI in Computers and Processors

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