fpga映射电路的精确热分布估计和验证

A. Amouri, H. Amrouch, T. Ebi, J. Henkel, M. Tahoori
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引用次数: 14

摘要

在设计阶段对FPGA进行精确的热分布估计,是在FPGA部署到现场运行之前避免电路中出现意外热热点的必要条件。热分布估计需要精确的动态和泄漏功率值,它们可以使用FPGA供应商的工具进行估计。然而,这些报告泄漏功率作为整个芯片的单个值,并且在文献或FPGA工具集中没有给出关于其在FPGA芯片上分布的详细信息,用于热模拟。为了解决这个问题,我们提出了一种在FPGA芯片上合理分配漏功率的方法。该方法采用温度泄漏回路估计模型对泄漏功率进行分布和调整,以实现更精确的热模拟。此外,为了准确校准所提出的方法及其模型,并验证所得到的热剖面,我们使用红外热像仪,测量Virtex-5 FPGA芯片背面的辐射。测试几种不同尺寸和频率的设计的结果表明,与相机测量相比,我们的方法可以实现准确的热剖面估计,整个芯片的平均绝对估计误差约为1°C。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Accurate Thermal-Profile Estimation and Validation for FPGA-Mapped Circuits
Accurate thermal profile estimation for FPGA, at design time, is necessary to avoid unexpected thermal hot-spots in the circuit before deploying the FPGA to the in-field operation. Both accurate dynamic and leakage power values are needed for the thermal profile estimation and they can be estimated using the FPGA vendor's tools. However these report leakage power as a single value for the whole chip, and no details are given in literature or the FPGA toolset about its distribution across the FPGA chip for the thermal simulation. To cope with this problem, we present a method for properly distributing the leakage power across the FPGA chip. The method uses a temperature-leakage loop estimation model for distributing and adapting the leakage power for more accurate thermal simulation. Furthermore, to accurately calibrate the presented method and its model and also to validate the resulting thermal profiles, we utilize an infrared thermal camera, which measures the emissions from the backside of a Virtex-5 FPGA chip. The results of testing several designs, with different sizes and frequencies, show that our approach can achieve accurate thermal-profile estimation when compared to the camera measurements, with average absolute estimation error of around 1°C across the chip.
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