基于电流复用结构的21.2- 23ghz超低功率注入锁定三倍频器

Xiaoying Deng, Linsen Xie
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引用次数: 2

摘要

本文利用中芯国际55nm CMOS设计套件,提出了一种基于电流复用结构的超低功耗注入锁定三倍频器(ILFT)。与传统的两个NMOS晶体管交叉耦合对的结构不同,引入了一种电流复用结构,由单个PMOS和NMOS晶体管组成交叉耦合对,从而实现了超低功耗。同时,我们在变压器的基础上增加了一个高阶谐振器,以弥补由于低功耗导致的锁定范围窄的致命缺陷。仿真结果表明,当注入为0-dBm时,LR可达到1.8 GHz (21.2-23 GHz, 8.1%),核心功耗仅为3.09-3.80 mW。当注入频率为7.33 GHz,相位噪声(PN)衰减为10.13 dBc/Hz时,输出锁定在22 GHz。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 21.2-23-GHz Ultra-Low-Power Injection-Locked Frequency Tripler Using Current-Reuse Structure
In this paper, an ultra-low-power injection-locked frequency tripler (ILFT) based on a current-reuse structure is proposed with SMIC 55-nm CMOS design kit. Different from the conventional structure with a cross-coupling pair of two NMOS transistors, a current-reuse structure is introduced, consisting of a single PMOS and NMOS transistors for the cross-coupling pair, resulting in ultra-low-power consumption. Meanwhile, we add a higher-order resonator based on the transformer to compensate for the fatal defect: narrow locking range (LR) due to low power consumption. In the simulation results, when injection at 0-dBm, the LR can reach 1.8 GHz (21.2–23 GHz, 8.1%) with only 3.09–3.80 mW core-power consumption. And output is locked at 22 GHz when injection at 7.33 GHz with 10.13 dBc/Hz @ 1MHz phase noise (PN) deterioration.
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