An efficient topology for multilevel inverters: Design specifications and modulation technique

This manuscript introduces an efficient and generalized basic topology adopted for multilevel inverters. It is shown that the proposed structure is in line with significant savings in part counts and control devices. According to the basic topology, a new structure for sub-multilevel inverter is suggested. In continue, cascaded multilevel inverter is realized based on the series connection of n sub-multilevel inverters. By calculating the blocking voltage across the switches, the modulation technique is described for the proposed structure. A comprehensive analysis is founded to compare the proposed cascaded structure with the conventional CHB topology and the recently archived structures. The working conditions and performance of the proposed structure is verified through the simulation studies conducted in MATLAB/Simulink platform. Results are discussed in depth.