基于45nm CMOS的42.24 Gb/s通道键合上转换器

2023 IEEE 23rd Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2023-01-22 DOI:10.1109/SiRF56960.2023.10046233

A. Siligaris, P. Courouve, G. Waltener, A. Hamani, C. Dehos, J. González-Jiménez

{"title":"基于45nm CMOS的42.24 Gb/s通道键合上转换器","authors":"A. Siligaris, P. Courouve, G. Waltener, A. Hamani, C. Dehos, J. González-Jiménez","doi":"10.1109/SiRF56960.2023.10046233","DOIUrl":null,"url":null,"abstract":"This paper presents an energy-efficient wideband Vband channel-bonding up-converter. The circuit, fabricated in 45nm CMOS RFSOI technology is composed of four lanes and an output hybrid combiner based on differential coupled lines. The circuit has four I and Q inputs and each one gets up-converted to a different channel at V-band at the output. The four required LO frequencies (58.32, 60.48, 62.64 and 64.48 GHz) are generated onchip using high integer number frequency multiplication from a common reference input at2.16 GHz that sets the channel spacing. Four-channel 64-QAM modulation is demonstrated with a total data rate of 42.24 Gb/s and 9.9 pJ/b of energy efficiency.","PeriodicalId":354948,"journal":{"name":"2023 IEEE 23rd Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-01-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 42.24 Gb/s Channel Bonding Up-Converter with integrated multi-LO generation in 45nm CMOS\",\"authors\":\"A. Siligaris, P. Courouve, G. Waltener, A. Hamani, C. Dehos, J. González-Jiménez\",\"doi\":\"10.1109/SiRF56960.2023.10046233\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an energy-efficient wideband Vband channel-bonding up-converter. The circuit, fabricated in 45nm CMOS RFSOI technology is composed of four lanes and an output hybrid combiner based on differential coupled lines. The circuit has four I and Q inputs and each one gets up-converted to a different channel at V-band at the output. The four required LO frequencies (58.32, 60.48, 62.64 and 64.48 GHz) are generated onchip using high integer number frequency multiplication from a common reference input at2.16 GHz that sets the channel spacing. Four-channel 64-QAM modulation is demonstrated with a total data rate of 42.24 Gb/s and 9.9 pJ/b of energy efficiency.\",\"PeriodicalId\":354948,\"journal\":{\"name\":\"2023 IEEE 23rd Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems\",\"volume\":\"49 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-01-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE 23rd Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SiRF56960.2023.10046233\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE 23rd Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SiRF56960.2023.10046233","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

提出了一种高效节能的宽带v波段信道键合上变频器。该电路采用45nm CMOS RFSOI技术制造，由四个通道和一个基于差分耦合线的输出混合组合器组成。电路有四个I和Q输入，每个输入在输出端的v波段上转换到不同的通道。四个所需的LO频率(58.32、60.48、62.64和64.48 GHz)是在芯片上使用高整数频率乘法从一个设置通道间隔的2.16 GHz公共参考输入生成的。四通道64-QAM调制的总数据速率为42.24 Gb/s，能效为9.9 pJ/b。

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A 42.24 Gb/s Channel Bonding Up-Converter with integrated multi-LO generation in 45nm CMOS

This paper presents an energy-efficient wideband Vband channel-bonding up-converter. The circuit, fabricated in 45nm CMOS RFSOI technology is composed of four lanes and an output hybrid combiner based on differential coupled lines. The circuit has four I and Q inputs and each one gets up-converted to a different channel at V-band at the output. The four required LO frequencies (58.32, 60.48, 62.64 and 64.48 GHz) are generated onchip using high integer number frequency multiplication from a common reference input at2.16 GHz that sets the channel spacing. Four-channel 64-QAM modulation is demonstrated with a total data rate of 42.24 Gb/s and 9.9 pJ/b of energy efficiency.

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2023 IEEE 23rd Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems

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