{"title":"基于ram的硬件加速器,用于网络数据匿名化","authors":"Fumito Yamaguchi, Kanae Matsui, H. Nishi","doi":"10.1109/FPL.2014.6927400","DOIUrl":null,"url":null,"abstract":"Many network services including intrusion detection and recommendation provide their services by analyzing information acquired from network transactions. A careful analysis of these data can reveal valuable information when deep packet inspection is performed. Since these packet analyses generate sensitive information from enormous volumes of transmitted data, the requirement for data anonymization has been discussed. There have been many studies of anonymization techniques and their implementation in software applications. However, limited research has been undertaken regarding hardware-based anonymizers. This paper proposes and evaluates a RAM-based anonymization architecture that maintains both high throughput and a low information-loss ratio.","PeriodicalId":172795,"journal":{"name":"2014 24th International Conference on Field Programmable Logic and Applications (FPL)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"RAM-based hardware accelerator for network data anonymization\",\"authors\":\"Fumito Yamaguchi, Kanae Matsui, H. Nishi\",\"doi\":\"10.1109/FPL.2014.6927400\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Many network services including intrusion detection and recommendation provide their services by analyzing information acquired from network transactions. A careful analysis of these data can reveal valuable information when deep packet inspection is performed. Since these packet analyses generate sensitive information from enormous volumes of transmitted data, the requirement for data anonymization has been discussed. There have been many studies of anonymization techniques and their implementation in software applications. However, limited research has been undertaken regarding hardware-based anonymizers. This paper proposes and evaluates a RAM-based anonymization architecture that maintains both high throughput and a low information-loss ratio.\",\"PeriodicalId\":172795,\"journal\":{\"name\":\"2014 24th International Conference on Field Programmable Logic and Applications (FPL)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-10-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 24th International Conference on Field Programmable Logic and Applications (FPL)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FPL.2014.6927400\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 24th International Conference on Field Programmable Logic and Applications (FPL)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FPL.2014.6927400","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
RAM-based hardware accelerator for network data anonymization
Many network services including intrusion detection and recommendation provide their services by analyzing information acquired from network transactions. A careful analysis of these data can reveal valuable information when deep packet inspection is performed. Since these packet analyses generate sensitive information from enormous volumes of transmitted data, the requirement for data anonymization has been discussed. There have been many studies of anonymization techniques and their implementation in software applications. However, limited research has been undertaken regarding hardware-based anonymizers. This paper proposes and evaluates a RAM-based anonymization architecture that maintains both high throughput and a low information-loss ratio.