长胖管网中并行TCP流的流平衡硬件

Yutaka Sugawara, M. Inaba, K. Hiraki
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引用次数: 6

摘要

在当今的高性能应用程序中,并行TCP流用于集群之间的数据传输。当并行TCP流在LFN上使用时,由于并行TCP流本身产生拥塞,部分流无法获得足够的带宽[5]。因此,数据传输吞吐量受到慢流的瓶颈。在本文中,我们提出了流协调器,调度并行TCP流的数据包传输以平衡带宽。流协调器的目的是减少由并行TCP流本身产生的拥塞,以提高慢流的性能。流协调器通过增加流的往返时间(RTT)来减少快速流的带宽,从而减少拥塞。在高速骨干网中,采用基于硬件的轻量级调度算法实现线率密集型调度。流协调器能够在不与终端主机交换额外信息的情况下调度数据包。在本文中,我们使用基于FPGA(现场可编程门阵列)的10gb以太网实验平台TGNLE-1实现了流谐波器。此外,我们使用基于FPGA的网络仿真器对流谐波器进行了评估。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Flow Balancing Hardware for Parallel TCP Streams on Long Fat Pipe Network
Parallel TCP streams are used for data transfer between clusters in today's high performance applications. When parallel TCP streams are used on LFN, part of streams fail to get enough bandwidth because of congestion generated by the parallel TCP streams themselves [5]. As a result, data transfer throughput is bottlenecked by the slow streams. In this paper, we propose the Stream Harmonizer that schedules packet transmission of parallel TCP streams to balance the bandwidth. The purpose of the Stream Harmonizer is to reduce the congestion that is generated by the parallel TCP streams themselves to improve the performance of the slow streams. The Stream Harmonizer reduces congestion by reducing the bandwidth of fast streams by in creasing the round trip time (RTT) of them. A hardware based lightweight scheduling algorithm is used to realize wire-rate intensive scheduling at high-speed backbone network. The Stream Harmonizer is able to schedule packets without exchanging additional information with end hosts. In this paper, we implement the Stream Harmonizer using TGNLE-1, an FPGA (Field Programmable Gate Array) based 10Gbit Ethernet experimental testbed. In addition, we evaluate the Stream Harmonizer using an FPGA based network emulator.
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