Accelerating Dynamic Fault Tree Analysis Based on Stochastic Logic Utilizing GPGPUs

This paper demonstrates on speeding up an accurate analysis of fault trees using stochastic logic through GPGPUs. Actually, probability models of dynamic gates and new accurate models for different combinations of cold spare gate e.g., two cold spare gates with a share spare and a cold spare gate with more than one spare inputs are developed in this paper. Experimental results show that on average, the proposed analysis method is 235 times faster than CPU simulation time. Moreover, proposing new stochastic models results accuracy and simplicity as additional advantages of the proposed method.