{"title":"具有低过采样比的时间交错增量数据转换器","authors":"T. Caldwell, D. Johns","doi":"10.1109/RME.2007.4401798","DOIUrl":null,"url":null,"abstract":"Incremental ADCs can operate at lower oversampling ratios than DeltaSigma modulators, resulting in higher input signal bandwidths. In this paper it is shown that time-interleaving can further increase the input signal bandwidth in incremental ADCs to the point that the oversampling ratio is equal to the time-interleaving factor, resulting in no decrease in the allowable input signal bandwidth due to oversampling. This paper investigates some of the advantages and challenges that time-interleaved incremental ADCs offer, and presents an example where a time-interleaved by 4 incremental ADC with an oversampling ratio of 4 can attain a resolution of 12 bits.","PeriodicalId":118230,"journal":{"name":"2007 Ph.D Research in Microelectronics and Electronics Conference","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Time-interleaved incremental data converters with low oversampling ratios\",\"authors\":\"T. Caldwell, D. Johns\",\"doi\":\"10.1109/RME.2007.4401798\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Incremental ADCs can operate at lower oversampling ratios than DeltaSigma modulators, resulting in higher input signal bandwidths. In this paper it is shown that time-interleaving can further increase the input signal bandwidth in incremental ADCs to the point that the oversampling ratio is equal to the time-interleaving factor, resulting in no decrease in the allowable input signal bandwidth due to oversampling. This paper investigates some of the advantages and challenges that time-interleaved incremental ADCs offer, and presents an example where a time-interleaved by 4 incremental ADC with an oversampling ratio of 4 can attain a resolution of 12 bits.\",\"PeriodicalId\":118230,\"journal\":{\"name\":\"2007 Ph.D Research in Microelectronics and Electronics Conference\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-07-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 Ph.D Research in Microelectronics and Electronics Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RME.2007.4401798\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 Ph.D Research in Microelectronics and Electronics Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RME.2007.4401798","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Time-interleaved incremental data converters with low oversampling ratios
Incremental ADCs can operate at lower oversampling ratios than DeltaSigma modulators, resulting in higher input signal bandwidths. In this paper it is shown that time-interleaving can further increase the input signal bandwidth in incremental ADCs to the point that the oversampling ratio is equal to the time-interleaving factor, resulting in no decrease in the allowable input signal bandwidth due to oversampling. This paper investigates some of the advantages and challenges that time-interleaved incremental ADCs offer, and presents an example where a time-interleaved by 4 incremental ADC with an oversampling ratio of 4 can attain a resolution of 12 bits.